Stack Control Board (SCB)

This board had the responsibility of implimenting two 255 word FIFO stacks in the 1024x16 bit RAM. It was a state machine that was provided inputs of the stack # to use (0 or 1), operation to perform (read or write) and, if write, the source of the data (Timer1 or Timer2). Two bytes were allocated at locations FF and 1FF to maintain stack pointers which represented first data address and first free address. Initially memory was set to all zeroes and this initialized stack pointers to empty stack state. Algorithms to write a word to stack and to pop word from FIFO was originally going to be included here, but I decided it would be pointless since anyone who's done any assembly language programming knows how to code a FIFO in a circular RAM buffer. The hardware algorithm I used was neat to review, but unless I get requests from other people to see it, it might never make it to the internet, although I plan on digitizing all of my notes and placing them in an unedited file which will be available over the internet, but the number of people who would find it usefull is likely miniscule.

In the case of overflow condition, the SCB halted in the overflow state which was indicated by setting the SCB state LED's to this value. Overflow condtion was defined as fatal since there was no point ni digitizing any more data if this happened. The reason for this is obvious when one considers that only inter-event intervals were transmitted to characterize the spike train; if a missed interval occurs, then all data which follows that interval is garbage since it results in a temporal shift of one spike train with respect to another by the value of the interval. A fatal stack overflow error signalled the need to take that particular piece of spike train data and either chop it into shorter sections, or re-record it at 1/2 speed so that it could be properly digitized.